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ks88c8316/c8324/p8324 product overview 1- 1 1 product overview sam87 product family samsung's sam87 family of 8-bit single-chip cmos microcontrollers offers a fast and efficient cpu, a wide range of integrated peripherals, and various mask-programmable rom sizes. important cpu features include: ? efficient register-oriented architecture ? selectable cpu clock sources ? release by interrupt of idle and stop power-down modes ? built-in basic timer circuit with watchdog function a sophisticated interrupt structure recognizes up to eight interrupt levels. each level can have one or more interrupt sources and vectors. fast interrupt processing (within a minimum six cpu clocks) can be assigned to specific interrupt levels. ks88c8316/c8324/p8324 the ks88c8316 microcontroller has 16 k bytes of on-chip program memory and the KS88C8324 has 24 k bytes. both chips have a 272-byte general-purpose internal register file. the interrupt structure has seven interrupt sources with six interrupt vectors. the cpu recognizes six interrupt priority levels. using a modular design approach, the following peripherals were integrated with the sam87 core to make the ks88c8316/c8324/p8324 suitable for use in color television and other types of screen display applications: ? four programmable i/o ports ( 26 pins total: 16 general-purpose i/o pins; 8 n-channel, open-drain output pins) ? 2 channel a/d converter (4-bit resolution) ? 14-bit pwm output (o ne channels: p ush-pull type ) ? basic timer (bt) with watchdog timer function ? one 8-bit timer/counter (t0) with interval timer ? one 8-bit general-purpose timer/counter (ta) wit h prescalers ? on-screen display (osd) with a wide range of programmable features including halftone control signal o utput the ks88c8316/c8324 are available in a versatile 42-pin sdip package. otp the ks88c8316/c8324 microcontroller is also available in otp (one time programmable) version, ks88p8324. ks88p8324 microcontroller has an on-chip 24k-byte one-time-programmable eprom instead of masked rom. the ks88p8324 is comparable to ks88c8316/c8324, both in function and in pin configuration.
product overview ks88c8316/c8324/p8324 1 - 2 features cpu ? sam87 cpu core memory ? 16-k byte (ks88c8316) or 24-k byte (KS88C8324) internal program memory ? 272-byte general-purpose register area instruction set ? 7 8 instructions ? idle and stop instructions added for power- down modes instruction execution time ? 750 ns (minimum) with an 8-mhz cpu clock interrupts ? 7 i nterrupt sources with 6 vectors ? 6 interrupt levels ? fast interrupt processing for select levels general i/o ? four i/o ports ( 26 pins total) ? six open-drain pins for up to 6 -volt loads ? two open-drain pins for up to 5 -volt loads 8-bit basic timer ? three select a ble internal clock frequencies ? watchdog or oscillation stabilization function timer/counters ? one 8-bit timer/counter (t0) with three internal clocks and interval timer mode. ? one general-purpose 8-bit timer/counters with interval tim er mode (timer a ) a/d converter ? two analog input pins; 4-bit resolution ? 3.125 s conversion time (8-mhz cpu clock) pulse width modulation module ? 14-bit pwm with one-channel output (push-pull type) ? pwm counter and data capture input pin ? frequency: 5.859 khz to 23.437 khz with a 6 -mhz cpu clock on-screen display (osd) ? video ram: 2 52 1 2 bits ? character generator rom: 256 18 1 6 bits ( 256 display characters: fixed: 2, variable: 254 ) ? 2 52 display positions (1 2 rows 2 1 columns) ? 1 6 -dot 18-dot character resolution ? 16 different character sizes ? eight character colors ? vertical direction fade-in/fade-out control ? eight colors for character and frame background ? halftone control signal output; selectable for individual characters ? synchronous polarity selector for h-sync and v -sync input oscillator frequency ? 5 -mhz to 8-mhz external crystal oscillator ? maximum 8-mhz cpu clock operating temperature range ? ? 20 c to + 85 c operating voltage range ? 4.5 v to 5.5 v package type ? 42-pin sdip
ks88c8316/c8324/p8324 product overview 1- 3 block diagram p0.0 - p0.7 reset p1.0 - p1.7 sam87 bus sam87 bus port 0 port 1 capa pwm0 vred vgreen vblue vblank osdht h-sync v-sync test osc in osc out int0 - int1 sam87 cpu x in x out adc0 adc1 port 2 p2.0 - p2.7 port 3 p3.0 - p3.1 port i/o and interrupt control 16-kb rom (8316) 24-kb rom (8324) 272-byte register file timer 0 timer a pwm block pwm counter and data capture 14-bit pwm on- screen display 4-bit adc l-c osc main osc figure 1 -1. block diagram
product overview ks88c8316/c8324/p8324 1 - 4 pin assignments p2.5/pwm0 p2.1 p2.2( scl ) p2.3( sda ) p2.4 p2.0 p2.6 p1.7 p3.0/adc0 p3.1/adc1 p0.6 p0.7 test p1.0/int0 p1.1/int1 p1.2 p1.3 p1.4 p1.5 p1.6 p2.7/osdht ks88c8316/ c8324/p8324 42-pin sdip (top view) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 p0.0 p0.1 p0.2 p0.3 p0.4 v ss2 capa p0.5 v dd reset x out x in v ss1 osc out osc in v-sync h-sync vblank vred vgreen vblue figure 1 -2. ks88c8316/c8324/p8324 pin assignment diagram
ks88c8316/c8324/p8324 product overview 1- 5 table 1 - 1. ks88c 83 16 /c8324 pin descriptions pin name pin type pin description circuit type pin numbers share pins p0.0?p0. 7 i/o general i/o port ( 8 -bit), configurable for digital input or push-pull output. 3 11?12, 35, 38?42 p1.0? p1.1 i/o general i/o port (2-bit), configurable for digital input or n-channel open-drain output. p1.0?p1.1 can withstand up to 6-volt loads. multiplexed for alternative use as external interrupt inputs int0 ?int1. 7 14?15 int0?int1 p1.2?p1.5 general i/o port (4-bit), configurable for digital input or n-channel open-drain output. p1.2?p1.5 can withstand up to 6-volt loads. high current port (10ma). 5 16?19 p1.6?p1.7 general i/o port (2-bit), configurable for digital input or push-pull output. 3 20, 8 p2.0?p2. 4, p2.6 i/o general i/o port ( 6 -bit). i/ o mode or n-channel open-drain , push-pull output mode is software configurable. pins can withstand up to 5-volt loads. p2.2: otp serial clock pin p2.3: otp serial data pin 2 2?7 p2.5, p2.7 general i/o port ( 2 -bit). i/ o mode or n-channel open-drain , push-pull output mode is software configurable. pins can withstand up to 5-volt loads. each pin has an alternative function. p2. 5 : pwm0 (14-bit pwm output) p2.7: osdht (halftone signal output) 2 1, 21 pwm0 osdht
product overview ks88c8316/c8324/p8324 1 - 6 table 1 - 1. ks88c 83 16 /c8324 pin descriptions (continued) pin name pin type pin description circuit type pin numbers share pins p3.0? p3.1 i/o general i/o port ( 2 bits), configurable for digital input or n-channel open-drain output. p3.0?p3.1 can withstand up to 5-volt loads. multiplexed for alternative use as external interrupt inputs adc0?adc1. 6 9?10 adc0 adc1 pwm0 o output pin for 14-bit pwm0 circuit 2 1 p2.5 adc0?adc1 i analog inputs for 4-bit a/d converter 6 9,10 p3.0? p3.1 int0?int1 i external interrupt input pins 7 14,15 p1.0? p1.1 osdht o halftone control signal output for osd 2 21 p2.7 vblue, vgreen vred, vblank o digital blue, green, red, and video blank signal outputs for osd 4 22?25 ? h-sync i h-sync input for osd 8 26 ? v-sync v-sync input for osd 27 osc in, osc out i, o l-c oscillator pins for osd clock frequency generation ? 28,29 ? test i 0 v: normal operation mode 5 v: factory test mode 12.5 v: otp write mode ? 13 ? x in, x out i, o system clock pins ? 31, 32 ? reset i system reset input pin 1 33 ? v dd, v ss1, v ss2 ? power supply pins ? 13 ? capa i input for capture a module 8 26 ?
ks88c8316/c8324/p8324 product overview 1- 7 pin circuits input in noise filter v dd 200 k w figure 1 -3. pin circuit type 1 ( reset ) data i/o input v ss open- drain output disable v dd figure 1 -4 . pin circuit type 2 ( p2.0?p2.7, pwm0, osdht ) data i/o input v ss v dd figure 1 -5 . pin circuit type 3 ( p0.0?p0.7, p1.6?p1.7 ) data i/o v ss v dd figure 1 -6. pin circuit type 4 ( vblue, vgreen, vred, vblank)
product overview ks88c8316/c8324/p8324 1 - 8 note: circuit type 5 can withstand up to 6-volt loads. i/o v ss data input figure 1 -7 . pin circuit type 5 (p1. 2 ?p1. 5 ) note: circuit type 6 can withstand up to 5-volt loads. i/o v ss data input a/d in figure 1 -8. pin circuit type 6 ( p3.0?p3.1, adc0?adc1 ) note: circuit type 7 can withstand up to 6-volt loads. i/o v ss data input i nt noise filter figure 1 -9. pin circuit type 7 (p 1. 0?p 1.1 , int0?int1) input in noise filter figure 1 -10. pin circuit type 8 ( v-sync h-sync, capa)
ks88c8316/c8324/p8324 electrical data 1 5- 1 1 5 electrical data overview in this section, ks88c8316/c8324 electrical characteristics are presented in tables and graphs. the information is arranged in the following order: ? absolute maximum ratings ? d.c. electrical characteristics ? i/o capacitance ? a.c. electrical characteristics ? input timing measurement points for t nf1 and t nf2 ? data retention supply voltage in stop mode ? stop mode release timing when initiated by reset ? main oscillator and l-c oscillator frequency ? clock timing measurement points for x in ? main oscillator clock stabilization time (t st ) ? a/d converter electrical characteristics ? characteristic curves
electrical data ks88c8316/c8324/p83 24 1 5- 2 table 15- 1 . absolute maximum ratings (t a = 25 c) parameter symbol conditions rating unit supply voltage v dd ? ? 0.3 to + 6 .0 v input voltage v i1 p 1 .0?p 1 .5 (open-drain) ? 0.3 to + 7 v v i2 all port pins except v i1 ? 0.3 to v dd + 0.3 output voltage v o all output pins ? 0.3 to v dd + 0.3 v output current high i oh one i/o pin active ? 18 ma all i/o pins active ? 60 output current low i ol one i/o pin active + 30 ma total pin current for port 1 + 100 total pin current for ports 0, 2 , and 3 + 100 operating temperature t a ? ? 2 0 to + 85 c storage temperature t stg ? ? 65 to + 150 c table 15- 2 . d.c. electrical characteristics (t a = ? 2 0 c to + 85 c, v dd = 4.5 v to 5.5 v) parameter symbol conditions min typ max unit input high voltage v ih1 all input pins except v ih2 0.8 v dd ? v dd v v ih 2 x i n, x out 2.7 v input low voltage v il1 all input pins except v il2 ? ? 0.2 v dd v v il2 x in, x out 1.0 v output high voltage v oh i oh = ? 500 a p 0 , p 1.6 ?p 1.7, p2 r, g, b, vblank v dd ? 0.8 ? ? v output low voltage v ol1 i ol = 4 ma p0, p1. 6 ?p1.7 ? ? 0.4 v v ol2 i ol = 1 0 ma p 1.2 ?p1. 5 ? ? 0.8 v ol3 i ol = 2 ma p1.0?p1.1, p 3 .0?p 3.1 ? ? 0.4 v ol4 i ol = 1 ma r, g, b, vblank, p 2 ? ? 0.4 v
ks88c8316/c8324/p8324 electrical data 1 5- 3 table 15- 2 . d.c. electrical characteristics (continued) (t a = ? 2 0 c to + 85 c, v dd = 4.5 v to 5.5 v) parameter symbol conditions min typ max unit input high leakage current i lih1 v in = v dd all input pins except i lih2 and i lih3 ? ? 3 a i lih2 v in = v dd, osc in, osc out 1 0 i lih3 v in = v dd, x in , x out 2.5 10 20 input low leakage current i lil1 v in = 0 v all input pins except i lil2, i lil3, and reset ? ? ? 3 a i lil2 v in = 0 v, osc in, osc out ? 1 0 i lil3 v in = 0 v, x in , x out ? 2.5 ? 10 ? 2 0 output high leakage current i loh1 v out = v dd all output pins except i loh2 ? ? 3 a i loh2 v out = 6 v p1.0?p1.5 1 0 output low leakage current i lol v out = 0 v all output pins ? ? ? 3 a supply current (note) i dd1 normal mode; v dd = 4.5 v to 5.5 v 8-mhz cpu clock ? 7 20 ma i dd2 idle mode; v dd = 4.5 v to 5.5 v 8-mhz cpu clock 2 10 i dd3 stop mode; v dd = 4.5 v to 5.5 v 1 10 a note : supply current does not include current drawn through internal pull-up resistors or external output current loads.
electrical data ks88c8316/c8324/p83 24 1 5- 4 table 15- 3 . input/output capacitance (t a = ? 2 0 c to + 85 c, v dd = 0 v) parameter symbol conditions min typ max unit input capacitance c in f = 1 mhz; unmeasured pins are connected to v ss ? ? 10 pf output capacitance c out i/o capacitance c io table 15- 4 . a.c. electrical characteristics (t a = ? 2 0 c to + 85 c, v dd = 4.5 v to 5.5 v) parameter symbol conditions min typ max unit v-sync pulse width t vw ? 4 ? ? s h-sync pulse width t hw ? 3 ? ? s noise filter t nf1 p 1.0 ?p 1.1, v-sync ? 3 5 0 ? ns t nf2 reset ? 1000 t nf3 glitch filter (oscillator block) ? 15 t nf 4 capa ? 5 ? t capa t nf 5 h-sync ? 650 ? ns note: t capa = f osc /128. t nf1l t nf1 h 0.8 v dd 0.2 v dd 1t cpu t nf2 figure 15- 1 . input timing measurement points for t nf1 and t nf2
ks88c8316/c8324/p8324 electrical data 1 5- 5 table 15- 5 . data retention supply voltage in stop mode (t a = ? 20 c to + 85 c) parameter symbol conditions min typ max unit data retention supply voltage v dddr stop mode 2 ? 6 v data retention supply current i dddr stop mode, v dddr = 2.0 v ? ? 5 a notes : 1. supply current does not include current drawn through int ernal pull-up resistors or external output current loads. 2. during the oscillator stabilization wait time (t wait ), all cpu operations must be stopped. t wait v dd reset execution of stop instruction v dddr data retention mode stop mode t srel oscillation stabilization time normal operating mode note: t wait is the same as 4096 x 16 x 1 / f osc ~ ~ ~ ~ figure 15- 2 . stop mode release timing when initiated by a reset
electrical data ks88c8316/c8324/p83 24 1 5- 6 table 15- 6 . main oscillator and l-c oscillator frequency (t a = ? 2 0 c to + 85 c, v dd = 4.5 v to 5.5 v) oscillator clock circuit conditions min typ max unit crystal c2 c1 x in x out osd block active 5 6 8 mhz osd block inactive 0.5 6 8 ceramic c2 c1 x in x out osd block active 5 6 8 mhz osd block inactive 0.5 6 8 external clock x in x out osd block active 5 6 8 mhz osd block inactive 0.5 6 8 l-c oscillator c2 c1 osc in osc out recommend value: c1 = c2 = 20 pf 5 6.5 8 mhz cpu clock frequency ? 0.032 6.0 8 mhz x in t xl t xh 2.7 v 1.0 v 1 / f osc figure 15- 3 . clock timing measurement points for x in
ks88c8316/c8324/p8324 electrical data 1 5- 7 table 15- 7 . main oscillator clock stabilization time (t a = ? 2 0 c to + 85 c, v dd = 4.5 v to 5.5 v) oscillator symbol test condition min typ max unit crystal ? v dd = 4.5 v to 6.0 v ? ? 20 ms ceramic (oscillation stabilization occurs when v dd is equal to the minimum oscillator voltage range.) 10 external clock x in input high and low level width (t xh, t xl ) 65 ? 100 ns release signal setup time t srel normal operation ? 1000 ? ns oscillation stabilization wait time ( 1 ) t wait cpu clock = 8 mhz; stop mode released by reset ? 8.3 ? ms cpu clock = 8 mhz; stop mode released by an interrupt ( 2 ) notes : 1 . oscillation stabilization time is the time required for the cpu clock to return to its normal oscillation frequency after a power-on occurs, or when stop mode is released. 2 . the oscillation stabilization interval is determined by the basic timer (bt) input clock setting. table 15- 8 . a/d converter electrical characteristics (t a = ? 2 0 c to + 85 c, v dd = 4.5 v to 5.5 v, v ss = 0 v) parameter symbol conditions min typ max unit absolute accuracy (1) ? cpu clock = 8 mhz ? ? 0.5 lsb conversion time (2) t con t cpu 25 (3) ? s analog input voltage v ian ? v ss ? v dd v analog input impedance r an ? 2 ? m w notes : 1. excluding quantization error, absolute accuracy values are within 1/2 lsb. 2. 'conversion time' is the time required from the moment a conversion operation starts until it ends. 3. the unit t cpu means one cpu clock period.
ks88c8316/c8324/p8324 mechanical data 1 6- 1 1 6 mechanical data overview the ks88c8316/c8324 microcontrollers are available in a 42-pin sip package (42-sdip-600). note : package dimensions are in millimeters. 42-sdip-600 14.00 0.2 0.50 0.1 39.10 0.2 0 ~ 15 0.25 +0.1 ? 0.05 #1 21 42 22 15.24 (1.77) 1.00 0.1 1.778 0.51min 3.50 0.2 3.30 0.3 5.08max figure 16- 1 . 42-pin sdip package mechanical data (42-sdip-600)
ks88c8316/c8324/p8324 ks88p8324 otp 17- 1 17 ks88p8324 otp overview the ks88p8324 single-chip cmos microcontroller is the otp (one time programmable) version of the ks88c8316/c8324 microcontroller. it has an on-chip otp rom instead of masked rom. the eprom is accessed by serial data format. the ks88p8324 is fully compatible with the ks88c8316/c8324, both in function and in pin configuration. because of its simple programming requirements, the ks88p8324 is ideal for use as an evaluation chip for the ks88c8316/c8324.
ks88p8324 otp ks88c8316/c8324 /p8324 17- 2 p2.5/pwm0 p2.1 sclk/ p2.2 sdat/ p2.3 p2.4 p2.0 p2.6 p1.7 p3.0/adc0 p3.1/adc1 p0.6 p0.7 test /test p1.0/int0 p1.1/int1 p1.2 p1.3 p1.4 p1.5 p1.6 p2.7/osdht p0.0 p0.1 p0.2 p0.3 p0.4 v ss2 / v ss capa p0.5 v dd / v dd reset/ reset x out x in v ss1 / v ss osc out osc in v-sync h-sync vblank vred vgreen vblue ks88p8324 42-pin sdip (top view) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 note: the bolds indicate an otp pin name. figure 17-1. ks88p8324 pin assignments (42-sdip)
ks88c8316/c8324/p8324 ks88p8324 otp 17- 3 table 17-1. descriptions of pins used to read/write the eprom main chip during programming pin name pin name pin no. i/o function p2.3 (pin 4) sdat 4 i/o serial data pin (output when reading, input when writing) input and push-pull output port can be assigned p2.2 (pin 3) sclk 3 i/o serial clock pin (input only pin) test v pp (test) 13 i 0 v: operating mode 5 v: test mode 12.5 v: otp mode reset reset 33 i 0 v: chip initialization, otp mode 5 v: operating mode v dd /v ss v dd /v ss 34/30, 37 i logic power supply pin. table 17-2. comparison of ks88p8324 and ks88c8316/c8324 features characteristic ks88p8324 ks88c8316/c8324 program memory 24 k byte eprom 24 k byte mask rom operating voltage (v dd ) 4.5 v to 5.5 v 4.5 v to 5.5 v otp programming mode v dd = 5 v, v pp (test) = 12.5 v ? pin configuration 42 sdip 42 sdip eprom programmability user program 1 time programmed at the factory

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